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  ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a fdp8896_f085 n-channel powertrench ? mosfet 30v, 92a, 5.9m general description this n-channel mosfet has been designed specifically to improve the overall efficiency of dc/dc converters using either synchronous or conventional switching pwm controllers. it has been optimized for low gate charge, low r ds(on) and fast switching speed. applications ? dc/dc converters features ?r ds(on) = 5.9m , v gs = 10v, i d = 35a ?r ds(on) = 7.0m , v gs = 4.5v, i d = 35a ? high performance trench technology for extremely low r ds(on) ? low gate charge ? high power and current handling capability mosfet maximum ratings t c = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v dss drain to source voltage 30 v v gs gate to source voltage 20 v i d drain current 92 a continuous (t c = 25 o c, v gs = 10v) (note 1) continuous (t c = 25 o c, v gs = 4.5v) (note 1) 85 a continuous (t amb = 25 o c, v gs = 10v, with r ja = 62 o c/w) 16 a pulsed figure 4 a e as single pulse avalanche energy (note 2) 74 mj p d power dissipation 80 w derate above 25 o c0.53w/ o c t j , t stg operating and storage temperature -55 to 175 o c r jc thermal resistance junction to case to-220 1.88 o c/w r ja thermal resistance junction to ambient to-220 ( note 3) 62 o c/w device marking device package reel size tape width quantity d g s to-220ab fdp series drain drain gate source (flange)  rohs compliant july 20 10 fdp8896_f085 n-channel powertrench mosfet ? ? qualified to aec q101 fdp8896 fdp8896_f085 to-220ab tube n/a 50 units
electrical characteristics t c = 25c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics (v gs = 10v) drain-source diode characteristics notes: 1: package current limitation is 80a. 2: starting t j = 25c, l = 36 h, i as = 64a, v dd = 27v, v gs = 10v. 3: pulse width = 100s. 4 symbol parameter test conditions min typ max units b vdss drain to source breakdown voltage i d = 250 a, v gs = 0v 30 - - v i dss zero gate voltage drain current v ds = 24v - - 1 a v gs = 0v t c = 150 o c - - 250 i gss gate to source leakage current v gs = 20v - - 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a 1.2 - 2.5 v r ds(on) drain to source on resistance i d = 35a, v gs = 10v - 0.0050 0.0059 i d = 35a, v gs = 4.5v - 0.0060 0.0070 i d = 35a, v gs = 10v, t j = 175 o c - 0.0078 0.0094 c iss input capacitance v ds = 15v, v gs = 0v, f = 1mhz - 2525 - pf c oss output capacitance - 490 - pf c rss reverse transfer capacitance - 300 - pf r g gate resistance v gs = 0.5v, f = 1mhz - 2.3 - q g(tot) total gate charge at 10v v gs = 0v to 10v v dd = 15v i d = 35a i g = 1.0ma -4867nc q g(5) total gate charge at 5v v gs = 0v to 5v - 25 36 nc q g(th) threshold gate charge v gs = 0v to 1v - 2.3 3.0 nc q gs gate to source gate charge - 8 - nc q gs2 gate charge threshold to plateau - 5.7 - nc q gd gate to drain ?miller? charge - 9.5 - nc t on tu r n - o n t i m e v dd = 15v, i d = 35a v gs = 4.5v, r gs = 6.2 - - 168 ns t d(on) turn-on delay time - 9 - ns t r rise time - 103 - ns t d(off) turn-off delay time - 56 - ns t f fall time - 44 - ns t off turn-off time - - 150 ns v sd source to drain diode voltage i sd = 35a - - 1.25 v i sd = 20a - - 1.0 v t rr reverse recovery time i sd = 35a, di sd /dt = 100a/ s- -27ns q rr reverse recovered charge i sd = 35a, di sd /dt = 100a/ s- -12nc fdp8896_f085 n-channel powertrench mosfet ? ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
typical characteristics t c = 25c unless otherwise noted figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. normalized maximum transient thermal impedance figure 4. peak current capability t c , case temperature ( o c) power dissipation multiplier 0 0 25 50 75 100 175 0.2 0.4 0.6 0.8 1.0 1.2 125 150 0 20 40 60 80 100 25 50 75 100 125 150 175 i d , drain current (a) t c , case temperature ( o c) current limited by package v gs = 4.5v v gs = 10v 0.1 1 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 0.01 2 t, rectangular pulse duration (s) z jc , normalized thermal impedance notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc x r jc + t c p dm t 1 t 2 0.5 0.2 0.1 0.05 0.01 0.02 duty cycle - descending order single pulse 100 1000 50 i dm , peak current (a) t, pulse width (s) 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t c = 25 o c i = i 25 175 - t c 150 for temperatures above 25 o c derate peak current as follows: transconductance may limit current in this region v gs = 4.5v fdp8896_f085 n-channel powertrench mosfet ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
figure 5. forward bias safe operating area note: refer to fairchild application notes an7514 and an7515 figure 6. unclamped inductive switching capability figure 7. transfer characteristics f igure 8. saturation characteristics figure 9. drain to source on resistance vs gate voltage and drain current figure 10. normalized drain to source on resistance vs junction temperature typical characteristics t c = 25c unless otherwise noted 0.1 1 10 100 1000 110 60 v ds , drain to source voltage (v) i d , drain current (a) t j = max rated t c = 25 o c single pulse limited by r ds(on) area may be operation in this 10 s 1ms dc 100 s 10ms 1 10 100 0.01 0.1 1 10 100 500 i as , avalanche current (a) t av , time in avalanche (ms) starting t j = 25 o c starting t j = 150 o c t av = (l)(i as )/(1.3*rated bv dss - v dd ) if r = 0 if r 0 t av = (l/r)ln[(i as *r)/(1.3*rated bv dss - v dd ) +1] 0 40 80 120 160 1.5 2.0 2.5 3.0 3.5 4 i d , drain current (a) v gs , gate to source voltage (v) pulse duration = 80 s duty cycle = 0.5% max v dd = 15v t j = 175 o c t j = 25 o c t j = -55 o c 0 40 80 120 160 0 0.25 0.5 0.75 1.0 1.25 1.5 i d , drain current (a) v ds , drain to source voltage (v) pulse duration = 80 s duty cycle = 0.5% max t c = 25 o c v gs = 10v v gs = 4v v gs = 3v v gs = 5v 4 6 8 10 12 14 246810 i d = 1a v gs , gate to source voltage (v) i d = 35a r ds(on) , drain to source on resistance (m ) pulse duration = 80 s duty cycle = 0.5% max 0.6 0.8 1.0 1.2 1.4 1.6 -80 -40 0 40 80 120 160 200 normalized drain to source t j , junction temperature ( o c) on resistance v gs = 10v, i d = 35a pulse duration = 80 s duty cycle = 0.5% max fdp8896_f085 n-channel powertrench mosfet ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
figure 11. normalized gate threshold voltage vs junction temperature figure 12. normalized drain to source breakdown voltage vs junction temperature figure 13. capacitance vs drain to source voltage figure 14. gate charge waveforms for constant gate current typical characteristics t c = 25c unless otherwise noted 0.4 0.6 0.8 1.0 1.2 -80 -40 0 40 80 120 160 200 v gs = v ds , i d = 250 a normalized gate t j , junction temperature ( o c) threshold voltage 0.9 1.0 1.1 1.2 -80 -40 0 40 80 120 160 200 t j , junction temperature ( o c) normalized drain to source i d = 250 a breakdown voltage 100 1000 0.1 1 10 30 5000 c, capacitance (pf) v ds , drain to source voltage (v) v gs = 0v, f = 1mhz c iss = c gs + c gd c oss ? c ds + c gd c rss = c gd 0 2 4 6 8 10 0 1020304050 v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15v i d = 35a i d = 16a waveforms in descending order: fdp8896_f085 n-channel powertrench mosfet ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
test circuits and waveforms figure 15. unclamped energy test circuit figure 16. unclamped energy waveforms figure 17. gate charge test circuit figure 18. gate charge waveforms figure 19. switching time test circuit figure 20. switching time waveforms t p v gs 0.01 l i as + - v ds v dd r g dut vary t p to obtain required peak i as 0v v dd v ds bv dss t p i as t av 0 v gs + - v ds v dd dut i g(ref) l v dd q g(th) v gs = 1v q gs2 q g(tot) v gs = 10v v ds v gs i g(ref) 0 0 q gs q gd q g(5) v gs = 5v v gs r l r gs dut + - v dd v ds v gs t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0 fdp8896_f085 n-channel powertrench mosfet ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
pspice electrical model .subckt fdp8896 2 1 3 ; rev november 2003 ca 12 8 2.3e-9 cb 15 14 2.3e-9 cin 6 8 2.3e-9 dbody 7 5 dbodymod dbreak 5 11 dbreakmod dplcap 10 5 dplcapmod ebreak 11 7 17 18 33 eds 14 8 5 8 1 egs 13 8 6 8 1 esg 6 10 6 8 1 evthres 6 21 19 8 1 evtemp 20 6 18 22 1 it 8 17 1 lgate 1 9 5.5e-9 ldrain 2 5 1.0e-9 lsource 3 7 2.7e-9 rlgate 1 9 55 rldrain 2 5 10 rlsource 3 7 27 mmed 16 6 8 8 mmedmod mstro 16 6 8 8 mstromod mweak 16 21 8 8 mweakmod rbreak 17 18 rbreakmod 1 rdrain 50 16 rdrainmod 2.3e-3 rgate 9 20 2.3 rslc1 5 51 rslcmod 1e-6 rslc2 5 50 1e3 rsource 8 7 rsourcemod 2e-3 rvthres 22 8 rvthresmod 1 rvtemp 18 19 rvtempmod 1 s1a 6 12 13 8 s1amod s1b 13 12 13 8 s1bmod s2a 6 15 14 13 s2amod s2b 13 15 14 13 s2bmod vbat 22 19 dc 1 eslc 51 50 value={(v(5,51)/abs(v(5,51)))*(pwr(v(5,51)/(1e-6*500),10))} .model dbodymod d (is=4e-12 ikf=10 n=1.01 rs=2.6e-3 trs1=8e-4 trs2=2e-7 + cjo=8.8e-10 m=0.57 tt=1e-16 xti=2.2) .model dbreakmod d (rs=8e-2 trs1=1e-3 trs2=-8.9e-6) .model dplcapmod d (cjo=9.4e-10 is=1e-30 n=10 m=0.4) .model mmedmod nmos (vto=1.98 kp=10 is=1e-30 n=10 tox=1 l=1u w=1u rg=2.3 t_abs=25) .model mstromod nmos (vto=2.4 kp=350 is=1e-30 n=10 tox=1 l=1u w=1u t_abs=25) .model mweakmod nmos (vto=1.68 kp=0.05 is=1e-30 n=10 tox=1 l=1u w=1u rg=23 rs=0.1 t_abs=25) .model rbreakmod res (tc1=8.3e-4 tc2=-4e-7) .model rdrainmod res (tc1=1e-3 tc2=8e-6) .model rslcmod res (tc1=9e-4 tc2=1e-6) .model rsourcemod res (tc1=7.5e-3 tc2=1e-6) .model rvthresmod res (tc1=-2.4e-3 tc2=-8.8e-6) .model rvtempmod res (tc1=-2.6e-3 tc2=2e-7) .model s1amod vswitch (ron=1e-5 roff=0.1 von=-4 voff=-3) .model s1bmod vswitch (ron=1e-5 roff=0.1 von=-3 voff=-4) .model s2amod vswitch (ron=1e-5 roff=0.1 von=-2 voff=-0.5) .model s2bmod vswitch (ron=1e-5 roff=0.1 von=-0.5 voff=-2) .ends note: for further discussion of the pspice model, consult a new pspice sub-circuit for the power mosfet featuring global temperature options ; ieee power electronics specialist conference records, 1991, written by william j. hepp and c. frank wheatley. 18 22 + - 6 8 + - 5 51 + - 19 8 + - 17 18 6 8 + - 5 8 + - rbreak rvtemp vbat rvthres it 17 18 19 22 12 13 15 s1a s1b s2a s2b ca cb egs eds 14 8 13 8 14 13 mweak ebreak dbody rsource source 11 7 3 lsource rlsource cin rdrain evthres 16 21 8 mmed mstro drain 2 ldrain rldrain dbreak dplcap eslc rslc1 10 5 51 50 rslc2 1 gate rgate evtemp 9 esg lgate rlgate 20 + - + - + - 6 fdp8896_f085 n-channel powertrench mosfet ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
saber electrical model rev november 2003 template fdp8896 n2,n1,n3 =m_temp electrical n2,n1,n3 number m_temp=25 { var i iscl dp..model dbodymod = (isl=4e-12,ikf=10,nl=1.01,rs=2.6e-3,trs1=8e-4,trs2=2e-7,cjo=8.8e-10,m=0.57,tt=1e-16,xti=2.2) dp..model dbreakmod = (rs=8e-2,trs1=1e-3,trs2=-8.9e-6) dp..model dplcapmod = (cjo=9.4e-10,isl=10e-30,nl=10,m=0.4) m..model mmedmod = (type=_n,vto=1.98,kp=10,is=1e-30, tox=1) m..model mstrongmod = (type=_n,vto=2.4,kp=350,is=1e-30, tox=1) m..model mweakmod = (type=_n,vto=1.68,kp=0.05,is=1e-30, tox=1,rs=0.1) sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-4,voff=-3) sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-3,voff=-4) sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-2,voff=-0.5) sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=-0.5,voff=-2) c.ca n12 n8 = 2.3e-9 c.cb n15 n14 = 2.3e-9 c.cin n6 n8 = 2.3e-9 dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.dplcap n10 n5 = model=dplcapmod spe.ebreak n11 n7 n17 n18 = 33 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evthres n6 n21 n19 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 i.it n8 n17 = 1 l.lgate n1 n9 = 5.5e-9 l.ldrain n2 n5 = 1.0e-9 l.lsource n3 n7 = 2.7e-9 res.rlgate n1 n9 = 55 res.rldrain n2 n5 = 10 res.rlsource n3 n7 = 27 m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u, temp=m_temp m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u, temp=m_temp m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u, temp=m_temp res.rbreak n17 n18 = 1, tc1=8.3e-4,tc2=-4e-7 res.rdrain n50 n16 = 2.3e-3, tc1=1e-3,tc2=8e-6 res.rgate n9 n20 = 2.3 res.rslc1 n5 n51 = 1e-6, tc1=9e-4,tc2=1e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 2e-3, tc1=7.5e-3,tc2=1e-6 res.rvthres n22 n8 = 1, tc1=-2.4e-3,tc2=-8.8e-6 res.rvtemp n18 n19 = 1, tc1=-2.6e-3,tc2=2e-7 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/500))** 10)) } } 18 22 + - 6 8 + - 19 8 + - 17 18 6 8 + - 5 8 + - rbreak rvtemp vbat rvthres it 17 18 19 22 12 13 15 s1a s1b s2a s2b ca cb egs eds 14 8 13 8 14 13 mweak ebreak dbody rsource source 11 7 3 lsource rlsource cin rdrain evthres 16 21 8 mmed mstro drain 2 ldrain rldrain dbreak dplcap iscl rslc1 10 5 51 50 rslc2 1 gate rgate evtemp 9 esg lgate rlgate 20 + - + - + - 6 fdp8896_f085 n-channel powertrench mosfet ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
pspice thermal model rev 23 november 2003 fdp8896t ctherm1 th 6 9e-4 ctherm2 6 5 1e-3 ctherm3 5 4 2e-3 ctherm4 4 3 3e-3 ctherm5 3 2 7e-3 ctherm6 2 tl 8e-2 rtherm1 th 6 3.0e-2 rtherm2 6 5 1.0e-1 rtherm3 5 4 1.8e-1 rtherm4 4 3 2.8e-1 rtherm5 3 2 4.5e-1 rtherm6 2 tl 4.6e-1 saber thermal model saber thermal model fdp8896t template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 6 =9e-4 ctherm.ctherm2 6 5 =1e-3 ctherm.ctherm3 5 4 =2e-3 ctherm.ctherm4 4 3 =3e-3 ctherm.ctherm5 3 2 =7e-3 ctherm.ctherm6 2 tl =8e-2 rtherm.rtherm1 th 6 =3.0e-2 rtherm.rtherm2 6 5 =1.0e-1 rtherm.rtherm3 5 4 =1.8e-1 rtherm.rtherm4 4 3 =2.8e-1 rtherm.rtherm5 3 2 =4.5e-1 rtherm.rtherm6 2 tl =4.6e-1 } rtherm4 rtherm6 rtherm5 rtherm3 rtherm2 rtherm1 ctherm4 ctherm6 ctherm5 ctherm3 ctherm2 ctherm1 tl 2 3 4 5 6 th junction case fdp8896_f085 n-channel powertrench mosfet ?2010 fairchild semiconductor corporation fdp8896_f085 rev. a
? fairchild semiconductor corporation www.fairchildsemi.com trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. accupower  auto-spm  build it now  coreplus  corepower  crossvolt  ctl  current transfer logic  deuxpeed ? dual cool? ecospark ? efficientmax  esbc  ? fairchild ? fairchild semiconductor ? fact quiet series  fact ? fast ? fastvcore  fetbench  flashwriter ? * fps  f-pfs  frfet ? global power resource sm green fps  green fps  e-series  g max  gto  intellimax  isoplanar  megabuck  microcoupler  microfet  micropak  micropak2  millerdrive  motionmax  motion-spm  optohit? optologic ? optoplanar ? ? pdp spm? power-spm  powertrench ? powerxs? programmable active droop  qfet ? qs  quiet series  rapidconfigure   saving our world, 1mw/w/kw at a time? signalwise  smartmax  smart start  spm ? stealth  superfet  supersot  -3 supersot  -6 supersot  -8 supremos  syncfet  sync-lock? ? * the power franchise ? tinyboost  tinybuck  tinycalc  tinylogic ? tinyopto  tinypower  tinypwm  tinywire  trifault detect  truecurrent  *  serdes  uhc ? ultra frfet  unifet  vcx  visualmax  xs? * trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. anti-counterfeiting policy fairchild semiconductor corporation's anti-counterfeiting policy. fairchild's anti-counterfeiting policy is also stated on our external website, www.fairchildsemi.com, under sales support. counterfeiting of semiconductor parts is a growing problem in the industry. all manufacturers of semiconductor products are exp eriencing counterfeiting of their parts. customers who inadvertently purchase counterfei t parts experience many problems such as loss of brand reputation, substandard p erformance, failed applications, and increased cost of production and manufacturing delays. fairchild is taking strong measures to protect ourselves and our cus tomers from the proliferation of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fairchild or from a uthorized fairchild distributors who are listed by country on our web page cited above. products customers buy either from fairchild directly or from authorized fairchi ld distributors are genuine parts, have full traceability, meet fairchild's quality standards for handling and storage and provide access to fairchild's full range of up-to-date technical and product information. fairchild and our authorized distributors will stand behind all warranties and will appropriately address any warranty issues t hat may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unauthorized sources. fairchild is committed to combat this glo bal problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. product status definitions definition of terms datasheet identification pr oduct status definition advance information formative / in design datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice to improve the design. obsolete not in production datasheet contains specifications on a product that is discontinued by fairchild semiconductor. the datasheet is for reference information only. rev. i48 fdp8896_f085 n-channel powertrench mosfet


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